Interface-based design of systems-on-chip using UML-RT

被引：1

作者：

Chureau, A ^{[1
]}

Savaria, Y ^{[1
]}

Aboulhamid, EM ^{[1
]}

机构：

[1] Ecole Polytech, Dept Genie Elect, Montreal, PQ H3C 3A7, Canada

来源：

4TH IEEE INTERNATIONAL WORKSHOP ON SYSTEM-ON-CHIP FOR REAL-TIME APPLICATIONS, PROCEEDINGS | 2004年

关键词：

D O I：

10.1109/IWSOC.2004.1319846

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

While the IC industry tries to harness System-on-Chip complexity by reusing Intellectual Property modules, practical problems abound. Reusing within tight hardware constraints is a design journey that may cost more than building from scratch. Platforms using pre-characterized interfaces gained acceptance as a paradigm that increases reuse predictability. In this paper, we present an interface-based approach to SoC design based on contract adorned UML-RT capsules. It is shown that well-defined interfaces are the key to define a systematic path towards the implementation of a System-on-Chip model. Two sets of capsules that form the base of two platforms, one for packet-based video processing and one for Software Radio, are built. IP reuse, refinement and profiling are performed within the context of these two platforms.

引用

页码：39 / 44

页数：6

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