Feedback driven instruction-set extension

被引:4
|
作者
Kastens, U [1 ]
Le, DK [1 ]
Slowik, A [1 ]
Thies, M [1 ]
机构
[1] Univ Paderborn, Fac Comp Sci Elect Engn & Math, Paderborn, Germany
关键词
design; performance; measurement; experimentation; instruction-set extensions; compiler generation; simulator generation; encryption; network processor; codesign;
D O I
10.1145/998300.997182
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. Since the extension of an instruction set and its utilization are non-trivial tasks, sophisticated tools have to provide guidance and support during design. Feedback driven optimization allows for the highest level of specialization, but calls for a simulator that is aware of the newly proposed instructions, a compiler that makes use of these instructions without manual intervention, and an application program that is representative for the targeted application domain. In this paper we introduce an approach for the extension of instruction sets that is built around a concise yet powerful processor abstraction. The specification of a processor is well suited to automatically generate the important parts of a compiler backend and cycle-accurate simulator. A typical design cycle involves the execution of the representative application program, evaluation of performance statistics collected by the simulator, refinement of the processor specification guided by performance statistics, and update of the compiler and simulator according to the refined specification. We demonstrate the usefulness of our novel approach by example of an instruction set for symmetric ciphers.
引用
收藏
页码:126 / 135
页数:10
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