A Harmonic Suppression Scheme for Full Speed Range of a Two-Level Inverter Fed Induction Motor Drive Using Switched Capacitive Filter

被引:25
|
作者
Pramanick, Sumit [1 ]
Karthik, R. Sudharshan [1 ]
Azeez, Najath Abdul [2 ]
Gopakumar, K. [1 ]
Williamson, Sheldon S. [2 ]
Rajashekara, Kaushik S. [3 ]
机构
[1] Indian Inst Sci, Dept Elect Syst Engn, Bangalore 560012, Karnataka, India
[2] Univ Ontario, Inst Technol, Dept Elect Comp & Software Engn, Oshawa, ON L1H 7K4, Canada
[3] Univ Texas Dallas, Dept Elect Engn, Dallas, TX 78712 USA
关键词
AC drives; dc-link; dodecagonal; harmonics; induction motors; pulse width modulation (PWM); space vector; END WINDING IM; MULTILEVEL INVERTER; SPACE; GENERATION; VECTORS;
D O I
10.1109/TPEL.2016.2561964
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper proposes a novel harmonic suppression scheme for two-level inverter fed three-terminal induction motor drives using switched capacitive filter. Capacitor fed H-bridges used as filters are cascaded to conventional two-level inverter to eliminate fifth-and seventh-order harmonics for the full modulation range including a six-step operation. For the first time, two-level dodecagonal voltage space vector is implemented with single dc supply for three-terminal induction motor drive. Enabling the switched capacitive filtering at low-voltage domain and shifting the high frequency switching to the switched capacitive filter is shown. A uniform pulse width modulation technique is shown which charges and maintains the capacitor voltages while eliminating the fifth-and seventh-order harmonics for the full speed range.
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页码:2064 / 2071
页数:8
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