GoldMine: Automatic Assertion Generation Using Data Mining and Static Analysis

被引：0

作者：

Vasudevan, Shobha ^{[1
]}

Sheridan, David ^{[1
]}

Patel, Sanjay ^{[1
]}

Tcheng, David ^{[1
]}

Tuohy, Bill ^{[1
]}

Johnson, Daniel ^{[1
]}

机构：

[1] Univ Illinois, Elect & Comp Engn Dept, Urbana, IL 61801 USA

来源：

2010 DESIGN, AUTOMATION & TEST IN EUROPE (DATE 2010) | 2010年

关键词：

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

We present GOLDMINE, a methodology for generating assertions automatically. Our method involves a combination of data mining and static analysis of the Register Transfer Level (RTL) design. We present results of using GoldMine for assertion generation of the RTL of a 1000-core processor design that is still in an evolving stage. Our results show that GoldMine can generate complex, high coverage assertions in RTL, thereby minimizing human effort in this process.

引用

页码：626 / 629

页数：4

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