Relaxation digital-to-analogue converter

被引：9

作者：

Crovetti, P. S. ^{[1
]}

Rubino, R. ^{[1
]}

Musolino, F. ^{[1
]}

机构：

[1] Politecn Torino, DET, Piemonte, Italy

来源：

ELECTRONICS LETTERS | 2019年 / 55卷 / 12期

关键词：

DAC;

D O I：

10.1049/el.2019.0784

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The novel relaxation digital-to-analogue conversion technique, which takes advantage of the exponential impulse response of a first-order RC network to generate binary-weighted voltages, is proposed to design standard-cell based, mismatch-insensitive, ultra-low power, tiny digital-to-analogue converters targeting the requirements of Internet of Things applications. The effectiveness of the approach is validated by simulations and measurements performed on a proof-of-concept 10 bit, 300 S/s field programmable gate array prototype.

引用

页码：685 / 687

页数：3

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