Operational and test performance in the presence of built-in current sensors

被引：0
|
作者：
Menon, SM
Malaiya, YK
Jayasumana, AP
Tong, CQ
机构：
[1] COLORADO STATE UNIV,DEPT COMP SCI,FT COLLINS,CO 80523
[2] COLORADO STATE UNIV,DEPT ELECT ENGN,FT COLLINS,CO 80523
[3] SUNRISE TEST SYST INC,FREMONT,CA 94538
来源：
VLSI DESIGN | 1997年 / 5卷 / 03期
关键词：
I-DDQ testing; built-in current sensors; chip partitioning;
D O I：
10.1155/1997/54757
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
The effects of Built-In Current Sensors (BIGS) on I-DDQ measurements as well as on the performance of the circuit under test are considered, Most of the Built-In Current Sensor designs transform the ground terminal of the circuit under test into a Virtual ground. This causes increases in both propagation delay and I-DDQ sampling time with the increase in the number of gates, affecting both test as well as operational performance. The effects that current sensors have on the operational and test performance of a circuit are considered. Circuit partitioning may be used for overcoming the effects of BIGS on I-DDQ measurements as well as on the performance of the circuit under lest.
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页码：285 / 298
页数：14
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