60 GHz- Band Low-Noise Amplifier

This paper presents the design of a 60 GHz-band LNA intended for the 63.72-65.88 GHz frequency range (channel-4 of the 60 GHz band). The LNA is designed in a 65-nm CMOS technology and the design methodology is based on a constant-current-density biasing scheme.Prior to designing the LNA, a detailed investigation into the transistor and passives performances at millimeter-wave (MMW) frequencies is carried out. It is shown that biasing the transistors for an optimum noise figure performance does not degrade their power gain significantly. Furthermore, three potential inductive transmission line candidates, based on coplanar waveguide (CPW) and microstrip line (MSL) structures, have been considered to realize the MMW interconnects. Electromagnetic (EM) simulations have been performed to design and compare the performances of these inductive lines. It is shown that the inductive quality factor of a CPW-based inductive transmission line(Q(L);(CPW))is more than 3.4 times higher than its MSL counterpart @ 65 GHz. A CPW structure, with an optimized ground-equalizing metal strip density to achieve the highest inductive quality factor, is therefore a preferred choice for the design of MMW interconnects, compared to an MSL. The LNA achieves a measured forward gain of 12 +/- 1: 44 dB with good input and output impedance matching of better than-10 dB in the desired frequency range. Covering a chip area of 1256 mu m x 500 mu m including the pads, the LNA dissipates a power of only 16.2mW.