Multi-time Averaging TDCs Implemented in an Actel Flash-based FPGA

Theoretical analysis and performance of multi-time averaging TDCs are presented in this paper. The TDCs are implemented in an Actel flash-based FPGA A3PE1500 using delay lines for time interpolating and utilizing CMOS buffers as the delay elements. Wave-union and Multi parallel delay chains method are employed for multi-time averaging to improve timing performance. The 17 times Wave-union TDC can achieve a best resolution of 32 ps RMS, while the 20 times Multi delay chains TDC can achieve a minimum resolution of 23 Ps RMS. Without the multi-time scheme, the TDC resolution is 127 Ps RMS and 427 ps averaged bin size.