DRA: A dependable architecture for high-performance routers

被引:0
|
作者
Mandviwalla, M [1 ]
Tzeng, NF [1 ]
机构
[1] Univ SW Louisiana, Ctr Adv Comp Studies, Lafayette, LA 70504 USA
关键词
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Due to a relentless increase in the amount of mission-critical real-time traffic over a revenue-generating network, dependability has come forth as a vital measure for such a network. To prevent extended downtimes and loss of critical data, most commercial routers achieve-fault tolerance by adding substantial redundancies for critical components. However, they often fail to utilize existing resources efficiently, unduly limiting their achievable dependability. To significantly improve the dependability of existing routers, we propose an efficient dependable architecture for high-performance routers, called dependable router architecture (DRA). DRA augments existing resources to create an additional level of interconnection across linecards for channeling resources from non-faulty linecards to linecards with faulty components. We analyze DRA using Markov models to assess its dependability improvement.
引用
收藏
页码:265 / 272
页数:8
相关论文
共 50 条
  • [21] Exploiting Graphics Processors for High-performance IP Lookup in Software Routers
    Zhao, Jin
    Zhang, Xinya
    Wang, Xin
    Deng, Yangdong
    Fu, Xiaoming
    2011 PROCEEDINGS IEEE INFOCOM, 2011, : 301 - 305
  • [22] A fault tolerance infrastructure for dependable computing with high-performance COTS components
    Avizienis, A
    DSN 2000: INTERNATIONAL CONFERENCE ON DEPENDABLE SYSTEMS AND NETWORKS, PROCEEDINGS, 2000, : 492 - 500
  • [23] AGORA: A Dependable High-Performance Coordination Service for Multi-Cores
    Schiekofer, Rainer
    Behl, Johannes
    Distler, Tobias
    2017 47TH ANNUAL IEEE/IFIP INTERNATIONAL CONFERENCE ON DEPENDABLE SYSTEMS AND NETWORKS (DSN), 2017, : 333 - 344
  • [24] HIGH-PERFORMANCE FFTS FOR A VLIW ARCHITECTURE
    RODMAN, PK
    CA-DSP 89, VOLS 1 AND 2: 1989 INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND DIGITAL SIGNAL PROCESSING, 1989, : S32 - S46
  • [25] A high-performance flexible architecture for cryptography
    Taylor, RR
    Goldstein, SC
    CRYPTOGRAPHIC HARDWARE AND EMBEDDED SYSTEMS, 1999, 1717 : 231 - 245
  • [26] An Adaptive High-Performance Service Architecture
    Andersson, Jesper
    Ericsson, Morgan
    Lown, Welf
    ELECTRONIC NOTES IN THEORETICAL COMPUTER SCIENCE, 2005, 114 : 87 - 102
  • [27] High-performance architecture for anisotropic filtering
    Bóo, M
    Amor, M
    JOURNAL OF SYSTEMS ARCHITECTURE, 2005, 51 (05) : 297 - 314
  • [28] Router Architecture for High-Performance NoCs
    Carara, Everton
    Calazans, Ney
    Moraes, Fernando
    SBCCI2007: 20TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, 2007, : 111 - 116
  • [29] FUTURE ARCHITECTURE OF HIGH-PERFORMANCE WORKSTATIONS
    FARBER, G
    MICROPROCESSING AND MICROPROGRAMMING, 1987, 21 (1-5): : 7 - 14
  • [30] An alternative architecture for high-performance display
    Corrigan, RW
    Lang, BR
    LeHoty, DA
    Alioshin, PA
    SMPTE JOURNAL, 2000, 109 (07): : 568 - 572