A novel multichannel UART design with FPGA-based implementation

Universal Asynchronous Receiver and Transmitter (UART) is a popular asynchronous serial communication standard Although the transmission speed is not too high, UART has the advantage of simplicity, it is easy to implement and has low power consumption. Therefore, UART is still used in various digital modules that do not require high communication speed, such as SIM module, Bluetooth, GPS, etc. However, communication with many low-speed peripherals can reduce the efficiency of data bus usage and processor's performance. In this paper, we propose a multichannel UART design to efficiently utilise the Advanced Peripheral Bus (APB) standard data bus in order to support simultaneously multiple transmission data frames with different rates. Then, we evaluate the performance of our multichannel UART design by means of simulations and practical implementation using Field-Programmable Gate Array boards. The evaluation results show that our proposed multi-channel UART module ensures stable operation while guaranteeing proper transmission to/from multiple devices following UART standard with different configurations.