Promising directions in hardware design verification

被引：1
|
作者：
Qadeer, S [1 ]
Tasiran, S [1 ]
机构：
[1] Compaq Syst Res Ctr, Palo Alto, CA 94301 USA
来源：
PROCEEDING OF THE 2002 3RD INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN | 2002年
关键词：
D O I：
10.1109/ISQED.2002.996776
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Ensuring the functional correctness of hardware early in the design cycle is crucial for both economic and methodological reasons. However, current verification techniques are inadequate for industrial designs. Formal verification techniques are exhaustive but do not scale; partial verification techniques based on simulation scale well but are not exhaustive. This paper discusses promising approaches for improving the scalability of formal verification and comprehensiveness of partial verification.
引用
收藏
页码：381 / 387
页数：7
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