PECVD Low-k SIOC (k=2.8) as a cap layer for 200nm pitch Cu interconnect using porous Low-k dielectrics (k=2.3)

被引：5

作者：

Lee, SG ^{[1
]}

Yoshie, T ^{[1
]}

Sudo, Y ^{[1
]}

Soda, E ^{[1
]}

Yoneda, K ^{[1
]}

Yoon, BU ^{[1
]}

Kobayashi, H ^{[1
]}

Kageyama, S ^{[1
]}

Misawa, K ^{[1
]}

Kondo, S ^{[1
]}

Nasuno, T ^{[1
]}

Matsubara, Y ^{[1
]}

Ohashi, N ^{[1
]}

Kobayashi, N ^{[1
]}

机构：

[1] Semicond Leading Edge Technol Inc, Selete, Tsukuba, Ibaraki 3058569, Japan

来源：

PROCEEDINGS OF THE IEEE 2004 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE | 2004年

关键词：

D O I：

10.1109/IITC.2004.1345685

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This work proposes a use of PECVD low-k carbon-doped SiO2 (SiOC) as a cap layer for 200nm pitch Cu interconnects using high-modulus porous MSQ (k=2.3) to reduce the low-k void formation and the effective dielectric constant (keff). The mechanism of void suppression is due to the high permeability of SiOC film for fluorine (F), which is incorporated in p-MSQ during damascene etching. The elimination of voids by application of SiOC cap layer is confirmed by FIB analysis as well as the electrical characteristics. The keff value of 200nm pitch Cu/p-MSQ interconnects is reduced using SiOC cap layer, which is in good agreement with the calculation. Thus, this process is promising for the reliable porous ultra low-k for the 65nm node and beyond.

引用

页码：63 / 65

页数：3

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