Improvement of voltage linearity in high-κ MIM capacitors using HfO2-SiO2 stacked dielectric

被引:80
|
作者
Kim, SJ [1 ]
Cho, BJ
Li, MF
Ding, SJ
Zhu, CX
Yu, MB
Narayanan, B
Chin, A
Kwong, DL
机构
[1] Natl Univ Singapore, Dept Elect & Comp Engn, Silicon Nano Device Lab, Singapore, Singapore
[2] Inst Microelect, Singapore 117685, Singapore
[3] Natl Tsing Hua Univ, Dept Elect Engn, Hsinchu 300, Taiwan
关键词
analog/mixed-signal ICs; high-kappa; dielectric; high-kappa/SiO2; stack; metal-insulator-metal (MINI) capacitor; voltage coefficient of capacitance (VCC);
D O I
10.1109/LED.2004.832785
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
It is demonstrated that the voltage coefficients of capacitance (VCC) in high-k, metal-insulator-metal (MIM) capacitors can be actively engineered and voltage linearity can be significantly improved maintaining high capacitance density, by using a stacked insulator structure of high-k and SiO2 dielectrics. A MIM capacitor with capacitance density of 6 fF mum(2) and quadratic VCC of only 14 ppm/V-2 has been demonstrated together with excellent frequency and temperature dependence (temperature coefficients of capacitance of 54 ppm degreesC) as well as low leakage current of less than 10 nA/cm(2) up to 4 V at 125 degreesC.
引用
收藏
页码:538 / 540
页数:3
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