VLSI architecture for a new real-time 3D wavelet transform

被引:0
|
作者
Das, B [1 ]
Banerjee, S [1 ]
机构
[1] Indian Inst Technol, Dept Elect & Elect Commun Engn, Kharagpur 721302, W Bengal, India
关键词
D O I
暂无
中图分类号
O42 [声学];
学科分类号
070206 ; 082403 ;
摘要
In this paper a real-time 3-D discrete wavelet transform algorithm is proposed. The inter-frame decomposition is achieved using the last two frames of the sequence. Reduced buffer and real-time applicability makes the algorithm usable for high-speed bi-directional interactive applications of mulitmedia and also HDTV. An efficient VLSI architecture which promises 100% hardware utilization, low buffeting and low hardware complexity is designed for the realization of the 3-D wavelet transform. DWT filters, designed by data-folding architecture and QMF lattice filters are arranged in pipeline to achieve the spatial decomposition with high throughput. A parallel array architecture is used for the decomposition in temporal direction which proves efficient to accomodate the huge amount of data.
引用
收藏
页码:3224 / 3227
页数:2
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