An improved low power CMOS readout circuit for focal plane array

被引:2
|
作者
Chen, ZG [1 ]
Li, XY [1 ]
Ji, LJ [1 ]
Han, JZ [1 ]
Yu, SG [1 ]
机构
[1] Peking Univ, Inst Microelect, Beijing 100871, Peoples R China
关键词
D O I
10.1109/ICASIC.2001.982698
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
An improved low power CMOS snapshot readout structure called OESCA (Odd-Even Snapshot Charge Amplifier) for focal plane array (FPA) is presented in this paper. Using two low power charge amplifiers as column readout circuit (one is for the odd-row readout and the other is for the even-row), this structure not only can eliminate the influence of column bus parasitic capacitance, but also can save 15% power dissipation of the column readout stage. The pixel circuit includes only three NMOSFETs. Thus, it is very suitable for large-format small-pixel lower-power readout circuit. An experimental 64 X 64 OESCA chip has been fabricated with 1.2-mum Double-Poly Double-Metal (DPDM) n-well CMOS technology. The charge handling capacity is 10.37pC with pixel size 50 X 50mum(2). A description of the readout circuit structure, pixel circuit, operation principle is given in detail. Both excellent simulation results and experimental results of the fabricated OESCA readout chip are presented.
引用
收藏
页码:854 / 857
页数:4
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