Design of high-Throughput QC-LDPC Decoder for WiMAX standard

被引：0

作者：

Heidari, Tahere ^{[1
]}

Jannesari, Abumoslem ^{[1
]}

机构：

[1] Tarbiat Modares Univ, Tehran, Iran

来源：

2013 21ST IRANIAN CONFERENCE ON ELECTRICAL ENGINEERING (ICEE) | 2013年

关键词：

LDPC; decoder; QC_LDPC; High Throughput; Min Sum Algorithm; SHANNON LIMIT PERFORMANCE; DENSITY;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a high throughput low-density parity-check (LDPC) decoder for 802.16e standard is presented. With simultaneous rows and columns processing, which reduced the number of clock cycles per iteration, the throughput of the decoder is improved. The proposed decoder architecture was designed for 802.16e standard with rate of 1/2 and code length of 2304 with 7-encodings style. It is synthesized on 130 nm CMOS technology by Synopsys Design Compiler. The obtained result in the operating frequency of 100 MHz shows total power consumption of 242mW and the chip area of 6.9 mm(2).

引用

页数：4

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