Alternatives to low-k nanoporous materials:: dielectric air-gap integration

Long considered theoretically possible, air gaps formed within multilevel on-chip interconnect structures are now under serious consideration as a means to lower the k value of intermetal dielectrics (IMD) for future manufacturing nodes. In fact, several integrated process flows can create air gaps, using established unit processes for deposition and etch. For example, a sacrificial material may be removed though a permeable dielectric cap, or nonconformal CVD can automatically form air gaps in properly spaced lines. Preliminary analyses of these techniques indicate that air-gap structures can be formed with acceptable yield, structural integrity, and reliability.