Synchronous to asynchronous conversion of digital circuits

被引:0
|
作者
Cassia, Ricardo [1 ]
Franca, Felipe [1 ]
Alves, Vladimir [2 ]
机构
[1] Univ Fed Rio de Janeiro, COPPE, PEE, PESC, BR-21945 Rio De Janeiro, Brazil
[2] Simple Tech, Santa Ana, CA USA
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this work an automated conversion method of synchronous circuits into asynchronous ones is presented. The technique utilizes the synchronous circuit fully synthesized netlist, and employs ASERT - Asynchronous Scheduling by Edge Reversal Timing - for signaling and synchronization between asynchronous functional units, which are ectracted from the functional blocks hierarchical organization conceived by the original synchronous circuit designer. The method utilizes CAD tools and standard cells libraries for traditional synchronous circuits in addition to a specific developed software.
引用
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页码:365 / +
页数:2
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