Compiler-Based Approach to Reducing Leakage Energy of Instruction Scratch-Pad Memories

被引：0

作者：

Huangfu, Yijie ^{[1
]}

Zhang, Wei ^{[1
]}

机构：

[1] Virginia Commonwealth Univ, Dept Elect & Comp Engn, Med Coll Virginia Campus, Richmond, VA 23284 USA

来源：

2013 IEEE 31ST INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD) | 2013年

关键词：

SPM; leakage reduction; compiler;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, we study a compiler-based approach to reducing the instruction SPM leakage energy efficiently, which can also minimize the performance overhead. Our evaluation indicates that the compiler-based approach is superior to periodical or bank-based methods. On average, the compiler-based method can reduce the SPM leakage energy by nearly 89.82%, with only 0.25% performance overhead.

引用

页码：439 / 442

页数：4

共 50 条

[31] Minimizing Inter-Task Interferences in Scratch-Pad Memory Usage for Reducing the Energy Consumption of Multi-Task Systems
Gauthier, Lovic
Ishihara, Tohru
Takase, Hideki
Tomiyama, Hiroyuki
Takada, Hiroaki
PROCEEDINGS OF THE 2010 INTERNATIONAL CONFERENCE ON COMPILERS, ARCHITECTURES AND SYNTHESIS FOR EMBEDDED SYSTEMS (CASES '10), 2010, : 157 - 166
[32] DRIFT: Decoupled CompileR-Based Instruction-Level Fault-Tolerance
Mitropoulou, Konstantina
Porpodas, Vasileios
Cintra, Marcelo
LANGUAGES AND COMPILERS FOR PARALLEL COMPUTING, LCPC 2013, 2014, 8664 : 217 - 233
[33] Compiler-based adaptive fetch throttling for energy-efficiency
Wang, Huaping
Guo, Yao
Koren, Israel
Krishna, C. Mani
ISPASS 2006: IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS OF SYSTEMS AND SOFTWARE, 2006, : 112 - +
[34] Experimental evaluation of a compiler-based cache energy optimization strategy
Kandemir, M
Kolcu, I
Kadayif, I
15TH ANNUAL IEEE INTERNATIONAL ASIC/SOC CONFERENCE, PROCEEDINGS, 2002, : 296 - 300
[35] Extended control flow graph based performance optimization using scratch-pad memory
Pu, HL
Ming, L
Jing, J
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, 2005, : 828 - 829
[36] Allocation of Scratch-Pad Memory in Priority-Based Multi-Task Systems
Takase, Hideki
Tomiyama, Hiroyuki
Takada, Hiroaki
2009 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT), PROCEEDINGS OF TECHNICAL PROGRAM, 2009, : 68 - 71
[37] Partitioning and Allocation of Scratch-Pad Memory for Energy Minimization of Priority-Based Preemptive Multi-Task Systems
Takase, Hideki
Tomiyama, Hiroyuki
Takada, Hiroaki
IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2011, E94A (10) : 1954 - 1964
[38] A compiler-based approach for improving intra-iteration data reuse
Kandemir, M
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, 2002 PROCEEDINGS, 2002, : 984 - 990
[39] Referee: A Pattern-Guided Approach for Auto Design in Compiler-Based Analyzers
Lv, Fang
Li, Hao
Wang, Lei
Liu, Ying
Cui, Huimin
Xue, Jingling
Feng, Xiaobing
PROCEEDINGS OF THE 2020 IEEE 27TH INTERNATIONAL CONFERENCE ON SOFTWARE ANALYSIS, EVOLUTION, AND REENGINEERING (SANER '20), 2020, : 1 - 12
[40] A compiler-based approach to design and engineering of complex real-time systems
Bakic, AM
Mutka, MW
19TH IEEE INTERNATIONAL CONFERENCE ON DISTRIBUTED COMPUTING SYSTEMS, PROCEEDINGS, 1999, : 306 - 313

← 1 2 3 4 5 →