Compiler-Based Approach to Reducing Leakage Energy of Instruction Scratch-Pad Memories

被引：0

作者：

Huangfu, Yijie ^{[1
]}

Zhang, Wei ^{[1
]}

机构：

[1] Virginia Commonwealth Univ, Dept Elect & Comp Engn, Med Coll Virginia Campus, Richmond, VA 23284 USA

来源：

2013 IEEE 31ST INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD) | 2013年

关键词：

SPM; leakage reduction; compiler;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, we study a compiler-based approach to reducing the instruction SPM leakage energy efficiently, which can also minimize the performance overhead. Our evaluation indicates that the compiler-based approach is superior to periodical or bank-based methods. On average, the compiler-based method can reduce the SPM leakage energy by nearly 89.82%, with only 0.25% performance overhead.

引用

页码：439 / 442

页数：4

共 50 条

[1] Compiler-Directed Leakage Energy Reduction for Instruction Scratch-Pad Memories
Yijie Huangfu
Wei Zhang
PROCEEDINGS OF THE FIFTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2014), 2015, : 392 - 399
[2] A compiler-based approach for dynamically managing scratch-pad memories in embedded systems
Kandemir, M
Ramanujam, J
Irwin, MJ
Vijaykrishnan, N
Kadayif, I
Parikh, A
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2004, 23 (02) : 243 - 260
[3] Compiler-based approach for exploiting scratch-pad in presence of irregular array access
Absar, MJ
Catthoor, F
DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, 2005, : 1162 - 1167
[4] Compiler-guided leakage optimization for banked scratch-pad memories
Kandemir, M
Irwin, MJ
Chen, GL
Kolcu, I
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2005, 13 (10) : 1136 - 1146
[5] Banked scratch-pad memory management for reducing leakage energy consumption.
Kandemir, M
Irwin, MJ
Chen, G
Kolcu, I
ICCAD-2004: INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, IEEE/ACM DIGEST OF TECHNICAL PAPERS, 2004, : 120 - 124
[6] MAGNETIC FILM SCRATCH-PAD MEMORIES
POHM, AV
IEEE TRANSACTIONS ON ELECTRONIC COMPUTERS, 1966, EC15 (04): : 452 - &
[7] COMPILER-BASED MULTIPLE INSTRUCTION RETRY
LI, CCJ
CHEN, SK
FUCHS, WK
HWU, WMW
IEEE TRANSACTIONS ON COMPUTERS, 1995, 44 (01) : 35 - 46
[8] Scratch-pad memory allocation without compiler support for java applications
Dept. of Electrical and Computer Engineering, University of Maryland, College Park, MD, United States
ACM Special Interest Group on Design Automation; ACM Special Interest Group on Embedded Systems; ACM SIG on Microarchitectural Research and Processing, 1600, 85-94 (2007):
[9] Optimal Data Placement for Memory Architectures with Scratch-Pad Memories
Guo, Yibo
Zhuge, Qingfeng
Hu, Jingtong
Sha, Edwin H. -M.
TRUSTCOM 2011: 2011 INTERNATIONAL JOINT CONFERENCE OF IEEE TRUSTCOM-11/IEEE ICESS-11/FCST-11, 2011, : 1045 - 1050
[10] Efficient Management of Scratch-Pad Memories in Deep Learning Accelerators
Pal, Subhankar
Venkataramani, Swagath
Srinivasan, Viji
Gopalakrishnan, Kailash
2021 IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS OF SYSTEMS AND SOFTWARE (ISPASS 2021), 2021, : 240 - 242

← 1 2 3 4 5 →