Design and implementation of the symmetrically extended 2-D wavelet transform

被引：0
|
作者：
McCanny, P [1 ]
Masud, S [1 ]
McCanny, J [1 ]
机构：
[1] Queens Univ Belfast, DSiP Labs, Belfast BT9 5AH, Antrim, North Ireland
来源：
2002 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS I-IV, PROCEEDINGS | 2002年
关键词：
D O I：
暂无
中图分类号：
O42 [声学];
学科分类号：
070206 ; 082403 ;
摘要：
The inclusion of the Discrete Wavelet Transform in the JPEG-2000 standard has added impetus to the research of hardware architectures for the two-dimensional wavelet transform. In this paper, a VLSI architecture for performing the symmetrically extended two-dimensional transform is presented. This architecture conforms to the J-PEG-2000 standard and is capable of near-optimal performance when dealing with the image boundaries. The architecture also achieves efficient processor utilization, Implementation results based on a Xilinx Virtex-2 FPGA device are included.
引用
收藏
页码：3108 / 3111
页数：2
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