Software for Explicitly Parallel Memory-Centric Processor Architecture

被引:0
|
作者
Dokoski, Goce [1 ]
Efnusheva, Danijela [1 ]
Tentov, Aristotel [1 ]
Kalendar, Marija [1 ]
机构
[1] SS Cyril & Methodius Univ, Fac Elect Engn & Informat Technol, Karpos II Bb,POB 574, Skopje 1000, North Macedonia
关键词
Explicit parallelism; memory-centric; high-performance computing; assembler; simulator;
D O I
暂无
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Advances in computer memory technology justify research towards new and different views on computer organization. This paper proposes a novel memory-centric computing architecture with the goal to merge memory and processing elements in order to provide better conditions for parallelization and performance. The paper introduces the architectural concepts and afterwards shows the design and implementation of a corresponding assembler and simulator.
引用
收藏
页码:37 / 40
页数:4
相关论文
共 50 条
  • [21] DataScalar: A memory-centric approach to computing
    Kaxiras, Stefanos
    Burger, Doug
    Goodman, James R.
    Journal of Systems Architecture, 1999, 45 (12) : 1001 - 1022
  • [22] Research Challenges in Memory-Centric Computing
    Ignatowski, Mike
    Beard, Jonathan C.
    Hady, Frank T.
    Jacob, Bruce
    Heroux, Michael A.
    PROCEEDINGS OF WORKSHOP ON MEMORY CENTRIC HIGH PERFORMANCE COMPUTING (MCHPC'18), 2018, : 3 - 3
  • [23] Memory-Centric Neuromorphic Computing With Nanodevices
    Querlioz, Damien
    Hirtzlin, Tifenn
    Klein, Jacques-Olivier
    Nowak, Etienne
    Vianello, Elisa
    Bocquet, Marc
    Portal, Jean-Michel
    Romera, Miguel
    Talatchian, Philippe
    Grollier, Julie
    2019 IEEE BIOMEDICAL CIRCUITS AND SYSTEMS CONFERENCE (BIOCAS 2019), 2019,
  • [24] A Survey on Memory-centric Computer Architectures
    Gebregiorgis, Anteneh
    Hoang Anh Du Nguyen
    Yu, Jintao
    Bishnoi, Rajendra
    Taouil, Mottaqiallah
    Catthoor, Francky
    Hamdioui, Said
    ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 2022, 18 (04)
  • [25] A Case for Memory-Centric HPC System Architecture for Training Deep Neural Networks
    Kwon, Youngeun
    Rhu, Minsoo
    IEEE COMPUTER ARCHITECTURE LETTERS, 2018, 17 (02) : 134 - 138
  • [26] An Explicitly Parallel Architecture for Packet Processing in Software Defined Networks
    Zolfaghari, Hesam
    Rossi, Davide
    Nurmi, Jari
    2019 IEEE NORDIC CIRCUITS AND SYSTEMS CONFERENCE (NORCAS) - NORCHIP AND INTERNATIONAL SYMPOSIUM OF SYSTEM-ON-CHIP (SOC), 2019,
  • [27] Hardware Implementation and Analysis of Gen-Z Protocol for Memory-Centric Architecture
    Hong, Seokbin
    Kwon, Won-Ok
    Oh, Myeong-Hoon
    IEEE ACCESS, 2020, 8 : 127244 - 127253
  • [28] Hardware Implementation and Analysis of Gen-Z Protocol for Memory-Centric Architecture
    Hong, Seokbin
    Kwon, Won-Ok
    Oh, Myeong-Hoon
    IEEE Access, 2020, 8 : 127244 - 127253
  • [29] Lightning Talk: Memory-Centric Computing
    Mutlu, Onur
    2023 60TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, DAC, 2023,
  • [30] An Explicitly Parallel Architecture for Packet Parsing in Software Defined Networks
    Zolfaghari, Hesam
    Rossi, Davide
    Nurmi, Jari
    2018 IEEE 29TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP), 2018, : 73 - 76