On efficiently producing quality tests for custom circuits in PowerPC™ microprocessors

被引:2
|
作者
Wang, LC [1 ]
Abadir, MS [1 ]
机构
[1] Motorola Inc, Somerset PowerPC Design Ctr, Austin, TX 78730 USA
关键词
custom circuits; ATPG; high level circuit extraction; DFT; time-to-market;
D O I
10.1023/A:1008353109659
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Custom circuits, in contrast to those synthesized by automatic tools, are manually designed blocks of which the performance is critical to the full chip operation. Testing these blocks represents a major challenge and thus a crucial time-to-market factor in today's PowerPC microprocessor design environment. This paper investigates various methodologies for testing custom blocks. Issues of efficiently obtaining proper circuit models for ATPG tools as well as producing quality tests will be analyzed and discussed. Tradeoffs among various methods will be analyzed and compared. Experience and results based on recent PowerPC microprocessors will be reported.
引用
收藏
页码:121 / 130
页数:10
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