Parallel Stimulus Generation Based on Model Checking for Coherence Protocol Verification

被引:0
|
作者
Zhao, Kang [1 ,2 ]
Shen, Wenbo [1 ]
机构
[1] Intel Corp, Beijing 100013, Peoples R China
[2] Tsinghua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R China
基金
中国国家自然科学基金;
关键词
Formal verification; model checking; system testing; SIMULATION;
D O I
10.1109/TVLSI.2014.2384040
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The complexity of the multicore communication protocols makes it a huge effort to validate the corresponding register transfer level (RTL). To achieve the high coverage of simulation, this brief proposes a covalidation method to generate the RTL testbench based on the model-checking technique. An object-oriented event-mapping technique is proposed to transform the sequential traces created by formal method to parallel RTL stimulus. A case study on the modified, exclusive, shared and invalid protocol was performed and showed that the covalidation method could save significant effort to create RTL testbenches while maintaining high coverage.
引用
收藏
页码:3124 / 3128
页数:5
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