Parallel Stimulus Generation Based on Model Checking for Coherence Protocol Verification

被引:0
|
作者
Zhao, Kang [1 ,2 ]
Shen, Wenbo [1 ]
机构
[1] Intel Corp, Beijing 100013, Peoples R China
[2] Tsinghua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R China
基金
中国国家自然科学基金;
关键词
Formal verification; model checking; system testing; SIMULATION;
D O I
10.1109/TVLSI.2014.2384040
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The complexity of the multicore communication protocols makes it a huge effort to validate the corresponding register transfer level (RTL). To achieve the high coverage of simulation, this brief proposes a covalidation method to generate the RTL testbench based on the model-checking technique. An object-oriented event-mapping technique is proposed to transform the sequential traces created by formal method to parallel RTL stimulus. A case study on the modified, exclusive, shared and invalid protocol was performed and showed that the covalidation method could save significant effort to create RTL testbenches while maintaining high coverage.
引用
收藏
页码:3124 / 3128
页数:5
相关论文
共 50 条
  • [1] Research on Cache Coherence Protocol Verification Method Based on Model Checking
    Zhao, Yiqiang
    Shi, Boning
    Zhang, Qizhi
    Yuan, Yidong
    He, Jiaji
    ELECTRONICS, 2023, 12 (16)
  • [2] Formal verification of a snoop-based cache coherence protocol using symbolic model checking
    Srinivasan, S
    Chhabra, PS
    Jaini, PK
    Aziz, A
    John, L
    TWELFTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 1999, : 288 - 293
  • [3] Model Checking in Parallel Logic Controllers Design and Verification
    Doligalski, Michal
    Tkacz, Jacek
    Gratkowski, Tomasz
    PROCEEDINGS OF THE 2015 FEDERATED CONFERENCE ON SOFTWARE DEVELOPMENT AND OBJECT TECHNOLOGIES, 2017, 511 : 35 - 53
  • [4] Parallel Statistical Model Checking for Safety Verification in Smart Grids
    Mancini, Toni
    Mari, Federico
    Melatti, Igor
    Salvo, Ivano
    Tronci, Enrico
    Gruber, Jorn Klaas
    Hayes, Barry
    Prodanovic, Milan
    Elmegaard, Lars
    2018 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CONTROL, AND COMPUTING TECHNOLOGIES FOR SMART GRIDS (SMARTGRIDCOMM), 2018,
  • [5] Formal verification of a group membership protocol using model checking
    Rosset, Valerio
    Souto, Pedro F.
    Vasques, Francisco
    ON THE MOVE TO MEANINGFUL INTERNET SYSTEMS 2007: COOPLS, DOA, ODBASE, GADA, AND IS, PT 1, PROCEEDINGS, 2007, 4803 : 471 - 488
  • [6] Diagnosability Verification with Parallel LTL-X Model Checking Based on Petri Net Unfoldings
    Madalinski, Agnes
    Khomenko, Victor
    2010 CONFERENCE ON CONTROL AND FAULT-TOLERANT SYSTEMS (SYSTOL'10), 2010, : 398 - 403
  • [7] Model checking-based safety verification for railway signal safety protocol-I
    Mei Meng
    Xu Zhongwei
    Wang Xi
    Wan Yongbing
    INTERNATIONAL JOURNAL OF COMPUTER APPLICATIONS IN TECHNOLOGY, 2013, 46 (03) : 195 - 202
  • [8] Model checking-based safety verification for railway signal safety protocol-I
    School of Electronics and Information Engineering, Tongji University, No. 4800 Cao'an Highway, Shanghai, China
    Meng, M. (mei_meng@163.com), 1600, Inderscience Enterprises Ltd., 29, route de Pre-Bois, Case Postale 856, CH-1215 Geneva 15, CH-1215, Switzerland (46):
  • [9] Model checking a cache coherence protocol of a Java']Java DSM implementation
    Pang, Jun
    Fokkink, Wan
    Hofman, Rutger
    Veldema, Ronald
    JOURNAL OF LOGIC AND ALGEBRAIC PROGRAMMING, 2007, 71 (01): : 1 - 43
  • [10] Comparative Analysis of Formal Model Checking Tools for Security Protocol Verification
    Patel, Reema
    Borisaniya, Bhavesh
    Patel, Avi
    Patel, Dhiren
    Rajarajan, Muttukrishnan
    Zisman, Andrea
    RECENT TRENDS IN NETWORK SECURITY AND APPLICATIONS, 2010, 89 : 152 - +