Defect Electronics in SiC and Fabrication of Ultrahigh-Voltage Bipolar Devices

被引:5
|
作者
Kimoto, T. [1 ]
Suda, J. [1 ]
Feng, G. [1 ]
Miyake, H. [1 ]
Kawahara, K. [1 ]
Niwa, H. [1 ]
Okuda, T. [1 ]
Ichikawa, S. [1 ]
Nishi, Y. [1 ]
机构
[1] Kyoto Univ, Dept Elect Sci & Engn, Nishikyo Ku, Kyoto 6158510, Japan
基金
日本学术振兴会;
关键词
EPITAXIAL-GROWTH; CURRENT GAIN; KV; DISLOCATIONS;
D O I
10.1149/05003.0025ecst
中图分类号
O7 [晶体学];
学科分类号
0702 ; 070205 ; 0703 ; 080501 ;
摘要
Fast epitaxial growth, defect reduction, device designing, and process development in SiC toward ultrahigh-voltage (> 10 kV) bipolar devices are investigated. 100 similar to 200 mu m-thick 4H-SiC epilayers with a low background doping concentration in the low 10(13) cm(-3) can be grown at a growth rate greater than 50 mu m/h. Impacts of extended defects on carrier recombination are clarified in photoluminescence mapping measurements. Generation and reduction of Z(1/2) center, the dominant lifetime killer, are summarized. After Z(1/2) elimination by thermal oxidation at 1400 degrees C, the carrier lifetime can be enhanced to 25 mu s or even longer. By utilizing space-modulated junction termination extension, a 21.7 kV PiN diode is demonstrated. Through unique process development, the current gain in bipolar junction transistors is increased to 250 similar to 330.
引用
收藏
页码:25 / 35
页数:11
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