A Shared-MSB Delay-Line-Based ADC with Simultaneous Quantization for Digital Control Single-Inductor-Multiple-Output DC-DC Converter

被引：0
|
作者：
Chen, Biao [1 ]
Zhu, Lei [1 ]
Zheng, Yanqi [2 ,3 ]
Guo, Jianping [1 ,2 ]
Ho, Marco [3 ]
Leung, Ka Nang [3 ]
Chen, Dihu [1 ,2 ]
Liu, Yang [1 ]
机构：
[1] Sun Yat Sen Univ, Sch Elect & Informat Technol, Guangzhou, Guangdong, Peoples R China
[2] Chinese Univ Hong Kong, Dept Elect Engn, Hong Kong, Hong Kong, Peoples R China
[3] SYSU CMU Shunde Int Joint Res Inst, Foshan, Peoples R China
来源：
2016 INTERNATIONAL SYMPOSIUM ON INTEGRATED CIRCUITS (ISIC) | 2016年
关键词：
Shared-MSB window ADC; Delay-line-based; Constant delay time; Simultaneous quantization; Digital control; SIMO DC-DC covnerter;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A shared-MSB sub-range delay-line-based window ADC capable of simultaneous quantization for digital control single-inductor-multiple-output (SIMO) DC-DC converter is proposed in this work. This ADC achieves the conversion by voltage-time-conversion (VTC) and time-digital-conversion (TDC). A Shared-MSB scheme is proposed and propagation delay of delay cells no longer depends on input voltages. Together with the fine-coarse conversion method, die area, matching difficulty and power consumption are reduced. The proposed ADC, containing 6 sub-ADCs with window from 1.0V to 1.4V, consumes die area of 0.065mm(2) and power of 100 mu A implemented in 0.18 mu m process. And the conversion time is within 32ns. A SIMO DC-DC adopting the proposed ADC regulates the output voltage to 1.8V, 2.5V, 3.3V and 5.0V.
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页数：4
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