Autonomous On-Chip Digital Calibration for Analog ICs in Nanotechnologies

This paper proposes implementation of on-chip digital calibration for a variable gain amplifier. It does not require additional setting or test, and therefore, it is autonomous. The calibrated amplifier can be used in continuous operation, while the 'ping-pong' technique is utilized. The prototype chip was fabricated in a standard 130 nm CMOS technology, and it operates under the supply voltage of 0.6 V. It is aimed at cancellation of VGA input offset voltage V-IOFF. Implemented system was verified through Monte Carlo and corner analysis at the design phase. After fabrication the experimental measurements took place over 10 packaged samples. Its results quite well fits between corners of simulations. The measured calibrated VGA exhibits the input offset voltage from 13 mu V to 167 mu V. In order to evaluate the contribution of implemented calibration method, the experimental measurements were also carried out over not calibrated VGA samples. These results reveal V-IOFF mu = 403 mu V and sigma = 3, 45 mV.