Test Sequence-Optimized BIST for Automotive Applications

被引:4
|
作者
Kaczmarek, Bartosz [1 ]
Mrugalski, Grzegorz [1 ]
Mukherjee, Nilanjan [1 ]
Rajski, Janusz [1 ]
Rybak, Lukasz [1 ]
Tyszer, Jerzy [2 ]
机构
[1] Mentor Siemens Business, Wilsonville, OR 97070 USA
[2] Poznan Univ Tech, PL-60965 Poznan, Poland
关键词
embedded-test; logic built-in self-test; LFSR reseeding; scan-based testing; test application time; test points; TEST DATA-COMPRESSION; TEST POINT INSERTION; DETERMINISTIC BIST; TIME;
D O I
10.1109/ets48528.2020.9131585
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
As the use of electronic components grows rapidly in the automotive industry, the number of complex safety-critical devices used in advanced driver assistance systems or autonomous cars is rising with high-end models containing more than 200 embedded microcontrollers. Achieving functionally safe automotive electronics requires test solutions that address challenges posed by high quality and long-term reliability requirements mandated, for example, by the ISO 26262 standard. The paper presents test pattern generation schemes for a scan-based logic BIST optimizing test coverage and test time during in-system test applications for automotive ICs. As a part of overall safety, they help in ensuring reliable operations of vehicle's electronics throughout their lifecycles. The proposed schemes can be deployed in different modes of in-system testing, including key-off, key-on, and periodic (incremental) online tests. Experimental results obtained for automotive designs and reported herein show improvements in test quality over conventional logic BIST schemes.
引用
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页数:6
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