共 50 条
- [1] Test Time and Area Optimized BIST Scheme for Automotive ICs [J]. 2019 IEEE INTERNATIONAL TEST CONFERENCE (ITC), 2019,
- [2] Nondestructive memory BIST for runtime automotive test [J]. EE: Evaluation Engineering, 2018, 57 (07): : 24 - 25
- [4] Deterministic Stellar BIST for In-System Automotive Test [J]. 2018 IEEE INTERNATIONAL TEST CONFERENCE (ITC), 2018,
- [5] An optimized BIST test pattern generator for delay testing [J]. 15TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 1997, : 94 - 100
- [6] Data path BIST synthesis with optimized test resources [J]. PROCEEDINGS OF THE 6TH INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN & COMPUTER GRAPHICS, 1999, : 706 - 710
- [9] An Optimized Test During Burn-In for Automotive SoC [J]. IEEE DESIGN & TEST, 2018, 35 (03) : 46 - 53
- [10] Markov Source Based Test Length Optimized SCAN-BIST Architecture [J]. ISQED 2009: PROCEEDINGS 10TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, VOLS 1 AND 2, 2009, : 708 - +