Design and implementation of multipattern generators in analog VLSI

被引:21
|
作者
Kier, Ryan J. [1 ]
Ames, Jeffrey C.
Beer, Randall D.
Harrison, Reid R.
机构
[1] Univ Utah, Dept Elect & Comp Engn, Salt Lake City, UT 84112 USA
[2] Case Western Reserve Univ, Dept Elect Engn & Comp Sci, Cleveland, OH 44106 USA
来源
IEEE TRANSACTIONS ON NEURAL NETWORKS | 2006年 / 17卷 / 04期
关键词
analog neural network; analog VLSI; central pattern generator (CPG) implementations; continuous-time recurrent neural network (CTRNN); multipattern generators;
D O I
10.1109/TNN.2006.875983
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
In recent years, computational biologists have shown through simulation that small neural networks with fixed connectivity are capable of producing multiple output rhythms in response to transient inputs. It is believed that such networks may play a key role in certain biological behaviors such as dynamic gait control. In this paper, we present a novel method for designing continuous-time recurrent neural networks (CTRNNs) that contain multiple embedded limit cycles, and we show that it is possible to switch the networks between these embedded limit cycles with simple transient inputs. We also describe the design and testing of a fully integrated four-neuron CTRNN chip that is used to implement the neural network pattern generators. We provide two example multipattern generators and show that the measured waveforms from the chip agree well with numerical simulations.
引用
收藏
页码:1025 / 1038
页数:14
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