A Comparative Study of Non-melt Laser Spike Annealing and Flash Lamp Annealing in Terms of Transistor Performance and Pattern Effects on SOI-CMOSFETs for the 32 nm Node and Below

Due to the continuous CMOS transistor scaling requirements, millisecond annealing has been introduced in 45 nm CMOS technology to enhance dopant activation with minimal dopant diffusion. This paper considers two different ultra fast annealing technologies as alternative to the conventional rapid thermal annealing strategy for the 32 nm node. We compared a long wavelength non-melt laser spike annealing and a flash lamp annealing in terms of CMOSFET device performance. We also investigated possible temperature variations induced by shallow trench isolation density variations of these two annealing techniques by means of electrical parameters. The comparison was made without the introduction of an absorbent layer to take into account the different absorption mechanism between laser spike annealing and flash lamp annealing. The results show that both approaches despite their different annealing techniques are full comparable in terms of device performance without any concerns in pattern effects at least for SOI-CMOSFETs and therefore equal useable for the 32 nm node and beyond.