Student-generated assignments about electrical circuits in a computer simulation

被引:21
|
作者
Vreman-de Olde, C [1 ]
de Jong, T [1 ]
机构
[1] Univ Twente, Fac Behav Sci, Enschede, Netherlands
关键词
D O I
10.1080/0950069032000138815
中图分类号
G40 [教育学];
学科分类号
040101 ; 120403 ;
摘要
In this study we investigated the design of assignments by students as a knowledge-generating activity. Students were required to design assignments for 'other students' in a computer simulation environment about electrical circuits. Assignments consisted of a question, alternatives, and feedback on those alternatives. In this way, subjects were encouraged to engage in processes such as 'generating questions', 'discriminating between examples and non-examples', and 'generating feedback'. The resulting assignments were analysed and different types of assignments were identified. Information on the design process was collected from think-aloud protocol data. Results showed that students not only designed assignments about facts or procedures, but also about observations made with the simulation. During the design process, subjects actively used their prior knowledge. Students seemed to strengthen their domain knowledge by retrieving and explaining problem-solving steps, and focus on the dynamic characteristics of the simulated circuits.
引用
收藏
页码:859 / 873
页数:15
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