Heterogeneous Integration Toward a Monolithic 3-D Chip Enabled by III-V and Ge Materials

被引:28
|
作者
Kim, Sang-Hyeon [1 ,2 ]
Kim, Seong-Kwang [1 ]
Shim, Jae-Phil [3 ]
Geum, Dae-Myeong [1 ,5 ]
Ju, Gunwu [3 ]
Kim, Han-Sung [3 ,6 ]
Lim, Hee-Jeong [3 ,7 ]
Lim, Hyeong-Rak [1 ,7 ]
Han, Jae-Hoon [1 ]
Lee, Subin [1 ]
Kim, Ho-Sung [1 ,6 ,7 ]
Bidenko, Pavlo [1 ,2 ]
Kang, Chang-Mo [4 ]
Lee, Dong-Seon [4 ]
Song, Jin-Dong [1 ,2 ]
Choi, Won Jun [1 ]
Kim, Hyung-Jun [2 ,3 ]
机构
[1] Korea Inst Sci & Technol, Ctr Optoelect Mat & Devices, Seoul 02792, South Korea
[2] Korea Univ Sci & Technol, Div Nano & Informat Technol, KIST Sch, Seoul 02792, South Korea
[3] Korea Inst Sci & Technol, Ctr Spintron, Seoul 02792, South Korea
[4] Gwangju Inst Sci & Technol, Sch Elect Engn & Comp Sci, Gwangju 61005, South Korea
[5] Seoul Natl Univ, Dept Mat Sci & Engn, Seoul 151742, South Korea
[6] Korea Univ, KU KIST Grad Sch Converging Sci & Technol, Seoul 02841, South Korea
[7] Korea Univ, Dept Elect & Comp Engn, Seoul 02841, South Korea
来源
基金
新加坡国家研究基金会;
关键词
Heterogeneous integration; monolithic; 3D; sequential; layer transfer; wafer bonding; epitaxial lift-off; III-V-OI; GOI; thin film PD; mid-IR photonics; microLED; SI SUBSTRATE; MIDINFRARED PHOTONICS; SILICON; FABRICATION;
D O I
10.1109/JEDS.2018.2802840
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Monolithic 3-D integration has emerged as a promising technological solution for traditional transistor scaling limitations and interconnection bottleneck. The challenge we must overcome is a processing temperature limit for top side devices in order to ensure proper performance of bottom side devices. To solve this problem, we developed a low temperature III-V and Ge layer stacking process using wafer bonding and epitaxial lift-off, since these materials can be processed at a low temperature and provide extended opportunity/functionality (sensor, display, analog, RF, etc.) via heterogeneous integration. In this paper, we discuss technology for integrating III-V and Ge materials and its applicability to CMOS, thin film photodiodes, mid-infrared photonics platforms, and MicroLED display integration for creating the ultimate 3-D chip of the future.
引用
收藏
页码:579 / 587
页数:9
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