Optimization of PCB Layout for 1-MHz High Step-Up/Down LLC Resonant Converters

被引:0
|
作者
Zhao, Xiaonan [1 ]
Chen, Cheng-Wei [1 ]
Lai, Jih-Sheng [1 ]
机构
[1] Virginia Polytech Inst & State Univ, Dept Elect & Comp Engn, Blacksburg, VA 24061 USA
来源
THIRTY-FOURTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC 2019) | 2019年
关键词
high step up/down LLC; MHz switching frequency; parasitics; PCB layout;
D O I
暂无
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
Nowadays, high power density is one of main pursuits for power converters. High switching frequency can greatly reduce the size of passive components. With the availability of wide bandgap devices, the converters have opportunities to operate at megahertz switching frequency with higher efficiency and power density. However, unlike the conventional kilohertz switching, parasitic inductances induced from the printed circuit board (PCB) could significantly affect the circuit operation under megahertz switching. In particularly, the parasitic effects will be enlarged for high step-up or step-down isolated converters, since the parasitic inductances are square times the turns ratio of the transformer when reflecting from low voltage side to high voltage side. This paper takes LLC converter as an example to discuss the optimization of PCB layout to reduce the parasitic effects with finite element method. In the experiments, a couple of 1-MHz 38V/380V 300-W LLC resonant converters are built and compared to verify the design optimization.
引用
收藏
页码:1226 / 1230
页数:5
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