Analysis of Ring Oscillator Structures to Develop a Design Methodology for RO-PUF Circuits

被引:0
|
作者
Komurcu, Giray [1 ]
Pusane, Ali Emre [2 ]
Dundar, Gunhan [2 ]
机构
[1] TUBITAK, Natl Res Inst Elect & Cryptol, TR-41470 Kocaeli, Turkey
[2] Bogazici Univ, Dept Elect & Elect Engn, TR-34342 Bebek, Turkey
关键词
Ring Oscillator; Physical Unclonable Functions; Robustness; Jitter; Spatial Variation;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Ring Oscillators (RO) are the main primitives of Physical Unclonable Functions (PUFs) that generate chip specific signatures depending on the uncontrollable components present in the manufacturing process. RO-PUFs are one of the popular PUF types among various structures presented in the literature. However, due to the noisy nature of RO circuits, robust output generation is problematic in RO-PUFs. Maximizing the robustness of a PUF is the main design objective, and analytical solutions have not been developed yet to overcome this problem. In this work, RO structures are analyzed and the effects of RO inverter count and measurement time are examined theoretically and practically in terms of jitter and spatial variation. Next, a design methodology is presented to easily determine the measurement time and RO inverter count for best performing RO-PUFs. In addition to this, the design methodology is practically verified by comparing the jitter and spatial variation to the robustness measurements of previously built RO-PUF circuits.
引用
下载
收藏
页码:332 / 335
页数:4
相关论文
共 50 条
  • [31] Simple electromagnetic analysis attack based on geometric leak on ASIC implementation of ring-oscillator PUF
    Mitsuru Shiozaki
    Takeshi Fujino
    Journal of Cryptographic Engineering, 2021, 11 : 201 - 212
  • [32] Design and Analysis of Ring Oscillator based Design-for-Trust technique
    Rajendran, Jeyavijayan
    Jyothi, Vinayaka
    Sinanoglu, Ozgur
    Karri, Ramesh
    2011 IEEE 29TH VLSI TEST SYMPOSIUM (VTS), 2011, : 105 - 110
  • [33] A Model & Design Methodology for Dead Time Linearised Current Controlled Ring Oscillator ADCs
    Wall, Anthony
    Walsh, Paul
    O'Hare, Daniel
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2024, 71 (09) : 4131 - 4135
  • [34] Computer design and analysis of relaxation oscillator circuits applying unijunction transistors
    Soliman, FAS
    Kamh, SA
    AlEsawey, F
    Elsenosi, UA
    MICROELECTRONICS JOURNAL, 1997, 28 (6-7) : 609 - 616
  • [35] Design and analysis of CMOS ring oscillator using 45 nm technology
    Sikarwar, Vandna
    Yadav, Neha
    Akashe, Shyam
    PROCEEDINGS OF THE 2013 3RD IEEE INTERNATIONAL ADVANCE COMPUTING CONFERENCE (IACC), 2013, : 1491 - 1495
  • [36] Design and performance analysis of wideband CMOS Voltage Controlled Ring Oscillator
    Bhardwaj, Monika
    Pandey, Sujata
    2015 2ND INTERNATIONAL CONFERENCE ON ELECTRONICS AND COMMUNICATION SYSTEMS (ICECS), 2015, : 142 - 145
  • [37] Integrating hypermedia design concepts with a systems analysis and design methodology to develop manufacturing web applications
    Giachetti, RE
    INTERNATIONAL JOURNAL OF COMPUTER INTEGRATED MANUFACTURING, 2005, 18 (04) : 329 - 340
  • [38] A Novel Design Methodology for High Tuning Linearity and Wide Tuning Range Ring Voltage Controlled Oscillator
    Rajahari, Gudlavalleti
    Varshney, Yashu Anand
    Bose, Subash Chandra
    VLSI DESIGN AND TEST, VDAT 2013, 2013, 382 : 10 - 18
  • [39] Design and analysis of frequency synthesizer with low power ring oscillator for wireless application
    Ramekar, Ujjwal V.
    Thakare, Ajay P.
    2014 INTERNATIONAL CONFERENCE ON GREEN COMPUTING COMMUNICATION AND ELECTRICAL ENGINEERING (ICGCCEE), 2014,
  • [40] Model Analysis of Multi-Finger MOSFET Layout in Ring Oscillator Design
    Jiang, Bo
    Xia, Tian
    2011 12TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED), 2011, : 347 - 352