A capstone computer engineering design course

被引：3
|
作者：
Richard, WD [1 ]
Taylor, DE [1 ]
Zar, DM [1 ]
机构：
[1] Washington Univ, Dept Elect Engn, St Louis, MO 63130 USA
来源：
IEEE TRANSACTIONS ON EDUCATION | 1999年 / 42卷 / 04期
关键词：
capstone design course; FPGA; microprocessor; VHDL;
D O I：
10.1109/13.804534
中图分类号：
G40 [教育学];
学科分类号：
040101 ; 120403 ;
摘要：
This paper describes the senior computer engineering capstone design course at Washington University in St. Louis. As part of this course, three-student teams develop a complete 8-bit microprocessor using a hardware description language (VHDL) and implement their designs in a small FPGA. Programmed FPGA's are "booted" at the end of the course and tested for accuracy. Students also write an assembler or a simple calculator for their microprocessor. This paper describes the microprocessor architecture and tool flow used in the course.
引用
收藏
页码：288 / 294
页数：7
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