Development methodology of ASIP based on Java']Java byte code using HW/SW co-design system for processor design

被引：1
|
作者：
Yanagisawa, H [1 ]
Uehara, M [1 ]
Mori, R [1 ]
机构：
[1] Toyo Univ, Dept Informat & Comp Sci, Kawagoe, Saitama, Japan
来源：
24TH INTERNATIONAL CONFERENCE ON DISTRIBUTED COMPUTING SYSTEMS WORKSHOPS, PROCEEDINGS | 2004年
关键词：
H-W/SW codesign system; ISA; ASIP; !text type='Java']Java[!/text] processor; C-DASH;
D O I：
10.1109/ICDCSW.2004.1284129
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
To develop an ASIP (Application Specific Instruction set Processor), development of HW (hardware) and development of SWDE (software development environments) are required. Separate develops of HW and SWDE in a short time are difficult. So HW/SW co-design system is necessary rapid develop of ASIPs. We have developed C-DASH(C-like Design Automation Shell), which is a HW/SW co-design system for designing processors based on ISA (Instruction Set Architecture). This paper describes the HW/SW co-design system C-DASH, along with a description of a java processor that directly executes Java byte code is given as an example.
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页码：831 / 837
页数：7
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