High-throughput Montgomery modular multiplicatior

被引:0
|
作者
Kamala, R. V. [1 ]
Srinivas, M. B. [1 ]
机构
[1] Int Inst Informat Technol, Ctr VLSI & Embedded Syst Technol, Hyderabad 500032, Andhra Pradesh, India
关键词
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中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The efficiency of public key encryption schemes like RSA and Elliptic Curve Cryptography can be improved using fast modular multiplication schemes. In this paper, the authors propose an efficient Montgomery modular multiplication technique that employs multi-bit shifting and carry-save addition to perform long-integer arithmetic and hence conventional lengthy additions required at each stage are avoided. The corresponding hardware realization is optimal in terms of delay and offers high data throughput compared to the recently proposed designs while it occupies slightly more area. The optimization is technology independent and thus should suit well for not only FPGA implementation but also ASIC. The design has been evaluated on Virtex2 series FPGA for practical bit lengths of 512, 1024 and 2048 bit.
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页码:58 / +
页数:2
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