A Digitally Controlled Oscillator for low jitter all digital phase locked loops

被引：5

作者：

Lee, Kwang-Jin ^{[1
]}

Jung, Seung-Hun ^{[1
]}

Kim, Yun-Jeong ^{[1
]}

Kim, Chul ^{[1
]}

Kim, Suki ^{[1
]}

Cho, Uk-Rae ^{[1
]}

Kwak, Choong-Guen ^{[1
]}

Byun, Hyun-Geun ^{[1
]}

机构：

[1] Korea Univ, Dept Elect Engn, Seoul 136701, South Korea

来源：

2005 IEEE ASIAN SOLID-STATE CIRCUITS CONFERENCE, PROCEEDINGS OF TECHNICAL PAPERS | 2005年

关键词：

D O I：

10.1109/ASSCC.2005.251741

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a Digitally Controlled Oscillator (DCO) for high speed ADPLLs. The proposed DCO circuit has control codes of thermometer type, which can reduce jitters. Performance of the DCO is verified through a novel ADPLL. The ADPLL chip with the DCO was fabricated using a 0.18um CMOS technology. The ADPLL has operation range between 520MHz and 1.5GHz and has 76ps peak-to-peak jitter at 668MHz.

引用

页码：365 / 368

页数：4

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