New 2-D Eye-Opening Monitor for Gb/s Serial Links

被引:8
|
作者
AL-Taee, Alaa R. [1 ]
Yuan, Fei [1 ]
Ye, Andy Gean [1 ]
Sadr, Saman [2 ]
机构
[1] Ryerson Univ, Dept Elect & Comp Engn, Toronto, ON M5B 2K3, Canada
[2] Semtech Corp, Dept Analog Design, Toronto, ON M9C 5E9, Canada
关键词
CMOS circuits and systems; decision feedback equalization (DFE); eye-opening monitor (EOM); Gb/s serial links; intersymbol interference; BACKPLANE TRANSCEIVER; ADAPTIVE EQUALIZATION; 0.13-MU-M CMOS; DFE RECEIVER; 10-GB/S; I/O; PREEMPHASIS; ADAPTATION; CIRCUIT; CLOCK;
D O I
10.1109/TVLSI.2013.2267805
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a new 2-D on-chip eye-opening monitor (EOM) for Gb/s serial links. A comprehensive review of the state-of-the-art of on-chip EOMs is provided and their pros and cons are investigated. A new hexagon 2-D EOM that outperforms the widely used rectangular 2-D EOMs is introduced and the implementation details are presented. The effectiveness of the proposed EOM is evaluated by embedding it in a serial link implemented in an IBM 130 nm 1.2 V CMOS technology. For the purpose of comparison, a rectangular 2-D EOM is also included in the same data link. The data link with a variable channel length and attenuation is analyzed using Spectre from Cadence Design Systems with BSIM four device models. Simulation results of the data link demonstrate that the proposed EOM outperforms the rectangular EOM by providing a tightened control of data jitter at the edge of data eyes and by eliminating unnecessary errors flagged by the rectangular EOM.
引用
收藏
页码:1209 / 1218
页数:10
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