A 3-V 5.4-mW BiCMOS Track&Hold circuit with sampling frequency up to 150 MHz

被引:4
|
作者
Schillaci, L
Baschirotto, A
Castello, R
机构
[1] Department of Electronics, University of Pavia
[2] Department of Electronics, University of Pavia
[3] University of California, Berkeley, CA
[4] SGS-Thomson Microelectronics, Milan
关键词
Sample and hold circuits;
D O I
10.1109/4.597282
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A Track&Hold circuit to he used in front of a highspeed analog-to-digital converter (ADC) is proposed. In order to achieve the required resolution with a single 3-V supply, a fully differential closed-loop architecture is used. The Track&Hold circuit processes a differential 1-Vpp output signal swing and achieves more than 8-b linearity with sampling frequency up to 150 MHz, In these renditions, the total power consumption is 5.4 mW from a single 3-V supply, The circuit has bern realized in a 0.7-mu m BiCMOS technology, and its active area is about 0.15 mm(2).
引用
收藏
页码:926 / 932
页数:7
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