CMOS floating gate defect detection using IDDQ test with DC power supply superposed by AC component

被引:2
|
作者
Michinishi, H [1 ]
Yokohira, T [1 ]
Okamoto, T [1 ]
Kobayashi, T [1 ]
Hondo, T [1 ]
机构
[1] Okayama Univ Sci, Fac Engn, Okayama, Japan
关键词
D O I
10.1109/ATS.2002.1181747
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
In this paper, we propose a new I-DDQ test method for detecting floating gate defects in CMOS ICs. In the method, unusual increase of the supply current caused by defects is promoted by superposing an AC component on the DC power supply. Feasibility of the test is examined by some experiments on four DUTs with an intentionally caused defect. The results showed that our method could detect clearly all the defects, one of which may be detected by neither any functional logic test nor any conventional IDDQ test.
引用
收藏
页码:417 / 422
页数:6
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