Adaptive Sub-Sampling Based Reconfigurable SAD Tree Architecture for HDTV Application

被引:0
|
作者
Huang, Yiqing [1 ]
Liu, Qin [1 ]
Goto, Satoshi [1 ]
Ikenaga, Takeshi [1 ]
机构
[1] Waseda Univ, IPS, Kitakyushu, Fukuoka 8080135, Japan
关键词
reconfigurable architecture; H.264/AVC; SAD tree; VLSI; HDTV; SIZE MOTION ESTIMATION; VLSI ARCHITECTURE; DESIGN;
D O I
10.1587/transfun.E92.A.2819
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a reconfigurable SAD Tree (RSADT) architecture based on adaptive sub-sampling algorithm for HDTV application. Firstly, to obtain the the feature of HDTV picture, pixel difference analysis is applied on each macroblock (MB). Three hardware friendly sub-sampling patterns are selected adaptively to release complexity of homegeneous MB and keep video quality for texture MB. Secondly, since two pipeline stages are inserted, the whole clock speed of RSADT structure is enhanced. Thirdly, to solve data reuse and hardware utilization problem of adaptive algorithm, the RSADT structure adopts pixel data organization in both memory and architecture level, which leads to full data reuse and hardware utilization. Additionally, a cross reuse structure is proposed to efficiently generate 16 pixel scaled configurable SAD (sum of absolute difference). Experimental results show that, our RSADT architecture can averagely save 61.71% processing cycles for integer motion estimation engine and accomplish twice or four times processing capability for homegeneous MBs. The maximum clock frequency of our design is 208 MHz under TSMC 0.18 mu m technology in worst work conditions(1.62 V, 125 degrees C). Furthermore, the proposed algorithm and reconfigurable structure are favorable to power aware real-time encoding system.
引用
收藏
页码:2819 / 2829
页数:11
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