Effect of thermal and electromigration exposure on solder joint board level drop reliability

被引:0
|
作者
Xu, Luhua [1 ]
Pang, John H. L. [1 ]
机构
[1] Nanyang Technol Univ, Sch Aerosp & Mech Engn, 50 Nanyang Ave, Singapore 639798, Singapore
关键词
D O I
暂无
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
The combined sequential reliability test of thermal cycling aging or electromigration test followed by board level drop test for lead-free SnAgCu soldered assemblies were investigated. hiterfacial IMCs, Kirkendall voids formation and interconnect failure mode are studied subject to TC aging and combined thermal-electromigration. Kirkendall voids were observed with Ar+ sputtering etching. The failure sites and mechanism were examined and correlated with IMC and void formation. Significant decrease of drop life was observed for both SAC/ENIG and SAC/Cu-OSP assemblies after thermal cycling aging. Growth of Kirkendall voids and IMC significantly weakened the solder joint interface during TC aging. Drop impact crack path changed from the IMC to the IMC/Cu interface.
引用
收藏
页码:570 / 575
页数:6
相关论文
共 50 条
  • [41] The effect of board stiffness on the solder-joint reliability of HVQFN-packages
    de Vries, J.
    Jansen, M.
    van Driel, W.
    EUROSIME 2007: THERMAL, MECHANICAL AND MULTI-PHYSICS SIMULATION AND EXPERIMENTS IN MICRO-ELECTRONICS AND MICRO-SYSTEMS, PROCEEDINGS, 2007, : 382 - +
  • [42] Low silver lead-free solder joint reliability of VFBGA packages under board level drop test at-45°C
    Niu, Xiaoyan
    Zhang, Zhanbiao
    Wang, Guixiang
    Shu, Xuefeng
    2014 15TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2014, : 762 - 765
  • [43] Board Level Drop Reliability of Hybrid Solder Joints with Controlled Bismuth Mixing Ratio for Carbon Neutrality
    Kim, Seahwan
    Min, Kyung Deuk
    Jung, Seung-Boo
    Yoon, Jae Jun
    Noh, Taejoon
    PROCEEDINGS OF THE IEEE 74TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, ECTC 2024, 2024, : 1473 - 1478
  • [44] Effect of Temperature on Transition in Failure Modes for High Speed Impact Test of Solder Joint and Comparison with Board Level Drop Test
    Guruprasad, Pradosh
    Pitarresi, James
    Sykes, Bob
    2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2010, : 908 - 915
  • [45] Comprehensive board-level solder joint reliability modeling and testing of QFN and PowerQFN packages
    Tee, TY
    Ng, HS
    Yap, D
    Zhong, ZW
    MICROELECTRONICS RELIABILITY, 2003, 43 (08) : 1329 - 1338
  • [46] Board-level solder joint reliability comparison of five unique memory package constructions
    Newman, K
    Freda, M
    Ito, H
    Yama, N
    Nakanishi, E
    PROCEEDINGS OF INTERNATIONAL SYMPOSIUM ON ELECTRONIC MATERIALS AND PACKAGING, 2000, : 27 - 43
  • [47] High Acceleration Dynamic Methodology for Board-Level Shock Solder Joint Reliability Approach
    Yu, Min-Cheng
    Wu, Nan-Yi
    Wang, Wu-Lung
    Shih, Hsin-Chih
    Lai, Wei-Hong
    Kao, Chin-Li
    Wang, Chen-Chao
    Hung, C. P.
    PROCEEDINGS OF THE IEEE 74TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, ECTC 2024, 2024, : 1213 - 1218
  • [48] Comprehensive design analysis of QFN and PowerQFN packages for enhanced board level solder joint reliability
    Tee, TY
    Ng, HS
    Diot, JL
    52ND ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2002 PROCEEDINGS, 2002, : 985 - 991
  • [49] Assessment of board level solder joint reliability for PBGA assemblies with lead-free solders
    Lee, SWR
    Lui, BHW
    Kong, YH
    Baylon, B
    Leung, T
    Umali, P
    Agtarap, H
    SOLDERING & SURFACE MOUNT TECHNOLOGY, 2002, 14 (03) : 46 - 50
  • [50] Study on the board-level SMT assembly and solder joint reliability of different QFN packages
    Sun, Wei
    Zhu, W. H.
    Danny, Retuta
    Che, F. X.
    Wang, C. K.
    Sun, Anthony Y. S.
    Tan, H. B.
    EUROSIME 2007: THERMAL, MECHANICAL AND MULTI-PHYSICS SIMULATION AND EXPERIMENTS IN MICRO-ELECTRONICS AND MICRO-SYSTEMS, PROCEEDINGS, 2007, : 344 - +