16 nm FinFET High-k/Metal-gate 256-kbit 6T SRAM macros with Wordline Overdriven Assist

被引：0
|
作者：
Yabuuchi, Makoto [1 ]
Morimoto, Masao [1 ]
Tsukamoto, Yasumasa [1 ]
Tanaka, Shinji [1 ]
Tanaka, Koji [1 ]
Tanaka, Miki [1 ]
Nii, Koji [1 ]
机构：
[1] Renesas Elect Corp, Tokyo 1878588, Japan
来源：
2014 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) | 2014年
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D O I：
暂无
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
We demonstrate 16 nm FinFET High-k/Metal-gate SRAM macros with a wordline (WL) overdriven read/write-assist circuit. Test-chip measurements confirm improved minimum operating voltage (V-min), standby leakage current, and access time compared to planar bulk CMOS. The proposed assist circuit improves V-min by 50 mV and improves read-access-time by more than 1.5 times in 256-kbit SRAM macros. Read current (I-read) dependence against the fin diffusion length was observed. An extra design guard-band is needed to provide a reliable operation margin.
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页数：7
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