A Method for Measuring and Alleviating Clock-jitter in Continuous-Time Delta-Sigma Modulators

被引:0
|
作者
Jiang, Yanfeng [1 ]
Zhang, Xiaobo [1 ]
Yang, Bing [1 ]
机构
[1] N China Univ Technol, Dept Microelect, Coll Informat Engn, Beijing 100144, Peoples R China
关键词
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暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Continuous-time Delta-Sigma modulators are able to operate at higher frequencies than their discrete-time counterparts. However, they suffer more severely from non-idealities such as clock jitter. A method for measuring this clock jitter has been proposed. Moreover, the effect of the non-ideality are explained and a continuous-time to discrete-time conversion method is presented in order to aid in the analysis of this effect. The SC-R feedback circuit has been presented here to help eliminate clock jitter noise.
引用
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页码:567 / 570
页数:4
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