Impact of 3D integration on 7nm high mobility channel devices operating in the ballistic regime

被引:0
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作者
Guo, W. [1 ]
Choi, M. [2 ]
Rouhi, A. [1 ,2 ]
Moroz, V.
Eneman, G. [1 ]
Mitard, J. [1 ]
Witters, L. [1 ]
Van der Plas, G. [1 ]
Collaert, N. [1 ]
Beyer, G. [1 ]
Absil, P. [1 ]
Thean, A. [1 ]
Beyne, E. [1 ]
机构
[1] IMEC, Kapeldreef 75, Leuven, Belgium
[2] Synopsys Inc, Mountain View, CA 94043 USA
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中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
We report for the first time the impact of 3D IC process induced local thermo-mechanical stress effects on CMOS devices for 7nm technology node (N7) operating in the ballistic regime. We show that the ballistic current is less affected by the uniaxial stress than the drift current. The ballistic current ratio decreases for longer gate, it is 80%, 45% of the total current for respectively 14nm and 40nm gate lengths devices resulting in larger TSV proximity effects for longer devices. 4 point bending measurements for Ge channel p-FinFETs, confirm the simulated stress sensitivities used to provide a physical estimation of the Keep Out Zone (KOZ). For high mobility channel devices, whereas N7 p-FinFETs exhibits similar TSV stress sensitivities, the KOZ for n-FinFETs is a function of the channel material choice for the co-integration. Unstrained Ge n-FinFETs are largely affected by the TSV proximity, 40% more than Si, SiGe and strained Ge n-FinFETs. Materials like Ge and InGaAs have a reduced sensitivity to the vertical stress component whereas the impact is significant in the case of Si and SiGe n-type devices, with more than 10% change in drive current for 400MPa compressive vertical stress.
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