High-Voltage NMOS in 0,5μm CMOS technology for fast switching applications

被引：0
|
作者：
Santos, PM [1 ]
Quaresma, H [1 ]
Silva, AP [1 ]
Lança, M [1 ]
机构：
[1] Univ Tecn Lisboa, Inst Telecommun, Inst Super Tecn, P-1049001 Lisbon, Portugal
来源：
2003 IEEE INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS, VOLS 1 AND 2 | 2003年
关键词：
NMOS transistors; CMOS; smart power integrated circuits; breakdown voltage;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper describes High-Voltage NMOS devices implementation in a deep submicron 0,5 mu CMOS process, only resorting to design layout strategies. Experiments show the viability of using the Gate-Shift technique to improve devices breakdown voltage to circa 29 V, while other electrical parameters are kept at reasonable values. From the availability of these High Voltage NMOS transistors it can be concluded that designers can resort to last generation CMOS processes to develop low cost smart power integrated circuits.
引用
收藏
页码：506 / 510
页数：5
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