Energy Efficient Boosting of GEMM Accelerators for DNN via Reuse

被引:2
|
作者
Cicek, Nihat Mert [1 ]
Shen, Xipeng [2 ]
Ozturk, Ozcan [3 ]
机构
[1] Aselsan Corp, Mehmet Akif Ersoy Mahallesi Istiklal Marsi Caddes, TR-06200 Ankara, Turkey
[2] North Carolina State Univ, Dept Comp Sci, Coll Engn, 890 Oval Dr,Engn Bldg 2, Raleigh, NC 27695 USA
[3] Bilkent Univ, Comp Engn Dept, Ankara, Turkey
关键词
Reuse; deep neural networks; gemm; accelerator; APPROXIMATE NEAREST-NEIGHBOR;
D O I
10.1145/3503469
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Reuse-centric convolutional neural networks (CNN) acceleration speeds up CNN inference by reusing computations for similar neuron vectors in CNN's input layer or activation maps. This new paradigm of optimizations is, however, largely limited by the overheads in neuron vector similarity detection, an important step in reuse-centric CNN. This article presents an in-depth exploration of architectural support for reuse-centric CNN. It addresses some major limitations of the state-of-the-art design and proposes a novel hardware accelerator that improves neuron vector similarity detection and reduces the energy consumption of reuse-centric CNN inference. The accelerator is implemented to support a wide variety of neural network settings with a banked memory subsystem. Design exploration is performed through RTL simulation and synthesis on an FPGA platform. When integrated into Eyeriss, the accelerator can potentially provide improvements up to 7.75x in performance. Furthermore, it can reduce the energy used for similarity detection up to 95.46%, and it can accelerate the convolutional layer up to 3.63x compared to the software-based implementation running on the CPU.
引用
收藏
页数:26
相关论文
共 50 条
  • [21] Boosting DNN-Based Speech Enhancement via Explicit Transformations
    Wang, Qing
    Du, Jun
    Dai, Li-Rong
    2016 ASIA-PACIFIC SIGNAL AND INFORMATION PROCESSING ASSOCIATION ANNUAL SUMMIT AND CONFERENCE (APSIPA), 2016,
  • [22] PipeFuser: Building Flexible Pipeline Architecture for DNN Accelerators via Layer Fusion
    Zhou, Xilang
    Li, Shuyang
    Lu, Haodong
    Wang, Kun
    29TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, ASP-DAC 2024, 2024, : 921 - 926
  • [23] Mix-GEMM: Extending RISC-V CPUs for Energy-Efficient Mixed-Precision DNN Inference Using Binary Segmentation
    Fornt, Jordi
    Reggiani, Enrico
    Fontova-Musté, Pau
    Rodas, Narcís
    Pappalardo, Alessandro
    Sabri Unsal, Osman
    Kestelman, Adrián Cristal
    Altet, Josep
    Moll, Francesc
    Abella, Jaume
    IEEE Transactions on Computers, 2025, 74 (02) : 582 - 596
  • [24] Energy Efficient DNN Compaction for Edge Deployment
    Baby, Bijin Elsa
    Deb, Dipika
    Sharma, Benuraj
    Vijayakumar, Kirthika
    Das, Satyajit
    APPLIED RECONFIGURABLE COMPUTING. ARCHITECTURES, TOOLS, AND APPLICATIONS, ARC 2023, 2023, 14251 : 290 - 303
  • [25] ReShare: A Resource-Efficient Weight Pattern Sharing Scheme for Memristive DNN Accelerators
    Hong, Shihao
    Chung, Yeh-Ching
    2024 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS 2024, 2024,
  • [26] Energy-Efficient Convolutional Neural Networks via Recurrent Data Reuse
    Mocerino, Luca
    Tenace, Valerio
    Calimera, Andrea
    2019 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2019, : 848 - 853
  • [27] A Novel Network Fabric for Efficient Spatio-Temporal Reduction in Flexible DNN Accelerators
    Munoz-Martinez, Francisco
    Abellan, Jose L.
    Acacio, Manuel E.
    Krishna, Tushar
    2021 15TH IEEE/ACM INTERNATIONAL SYMPOSIUM ON NETWORKS-ON-CHIP (NOCS 2021), 2021, : 1 - 8
  • [28] MEIN: A Multicast-Efficient Interconnect Network for Multi-Chiplet DNN Accelerators
    Chen, Hao
    Wang, Xuyan
    Zhang, Jinming
    Han, Xiao
    Cai, Siqi
    Ye, Yaoyao
    He, Guanghui
    2024 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS 2024, 2024,
  • [29] MAERI: Enabling Flexible Dataflow Mapping over DNN Accelerators via Reconfigurable Interconnects
    Kwon, Hyoukjun
    Samajdar, Ananda
    Krishna, Tushar
    ACM SIGPLAN NOTICES, 2018, 53 (02) : 461 - 475
  • [30] Exploring Fault-Energy Trade-offs in Approximate DNN Hardware Accelerators
    Siddique, Ayesha
    Basu, Kanad
    Hoque, Khaza Anuarul
    PROCEEDINGS OF THE 2021 TWENTY SECOND INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2021), 2021, : 343 - 348