Trends in microelectronics, optical detectors, and biosensors

The ultimate downsizing of the minimum feature size is hampered by physical, technological, and economical limitations. To ensure Moore's law below 100 nm technology nodes both front- and backend processing have to face technological challenges as clearly stipulated by the International Technology Roadmap for Semiconductors (ITRS). Lithography, gate stack, shallow junctions, high- and low-k dielectrics, and interconnect schemes are nowadays amongst the hot research issues leading to a global collaboration. This paper reviews some of the on-going research efforts to come to cost-effective solutions forming the backbone for future technology generations. Moreover the status and evolution of complementary metal oxide semiconductor (CMOS) compatible image sensors, infrared (IR) detectors, and of biosensors is treated.